Accelerator-Rich, Heterogeneous Multi-Core Architectures

Project Overview

With architectural innovations and technology scaling reaching fundamental limits, energy efficiency is one of the primary design concerns today. It is well-accepted that specialization and heterogeneity can achieve both high performance and low power consumption, but there are fundamental tradeoffs between flexibility and specialization in determining the right mix of cores on a chip. We study these questions through algorithm/architecture co-design of specialized architectures and accelerators for various domains, including a novel, extremely energy-efficient Linear Algebra Processor (LAP), as well as novel architectures and tools for accelerator integration and heterogeneous system design.

Selected Publications


Mochamad Asri
Mochamad Asri
2020, Facebook (FRL), Menlo Park, CA
Ardavan Pedram
2013, co-supervised with Prof. van de Geijn), post-doc at Stanford